CPUID Modifications for AMD Processors
The CPUID information presented in the following table reflects the hypervisor behavior of the CPUID instruction as documented in AMD Publication 25481, revision 2.18, issued January, 2006. All CPUID feature flags documented after that date will be returned cleared. In addition, all CPUID indexes not listed in the tables will return values that are all cleared.
CPUID modifications for AMD processors | |||
Index | Register | Name | Hypervisor value |
---|---|---|---|
0x00000000 |
EAX |
Maximum valid CPUID index |
Minimum of the actual hardware value and 0x00000001. |
EBX ECX EDX |
Processor vendor |
Unmodified. | |
0x00000001 |
EAX |
Family, Model, Stepping Identifiers |
Unmodified for the root partition, set as the minimum otherwise (for more information about these identifiers, see Family, Model and Stepping Reported by CPUID). |
EBX |
LocalApicId, LogicalProcessorCount, CLFlush, BrandIndex |
Bits 0-7: BrandIndex unmodified. Bits 8-15: CLFLUSH size unmodified. Bits 16-23: LogicalProcessorCount unmodified. [For the root partition, this field is always unmodified.] Bits 24-31: LocalApicId modified to match low-order 8 bits of initial APIC ID of the virtual processor. [For the root partition, this field is unmodified.] | |
ECX |
Feature Identifiers |
Bit 0: SSE3, unmodified. Bits 1-12: reserved, cleared. Bit 13: CMPXCHG16B, unmodified. Bits 14-30: reserved, cleared. Bit 31: if set, indicates that a hypervisor is present. | |
EDX |
Feature information |
Bit 0: FPU, unmodified. Bit 1: VME, unmodified. Bit 2: DE, unmodified. Bit 3: PSE, unmodified. Bit 4: TSC, unmodified. Bit 5: MSR, unmodified. Bit 6: PAE, unmodified. Bit 7: MCE, unmodified. Bit 8: CMPXCHG8B, unmodified. Bit 9: APIC, unmodified. Bit 10: reserved, cleared. Bit 11: SysEnterSysExit, unmodified. Bit 12: MTRR, set. Bit 13: PGE, unmodified. Bit 14: MCA, unmodified for root, cleared otherwise. Bit 15: CMOV, unmodified. Bit 16: PAT, unmodified. Bit 17: PSE36, unmodified. Bit 18: reserved, cleared. Bit 19: CLFSH, unmodified. Bits 20-22: reserved, cleared. Bit 23: MMX, unmodified. Bit 24: FXSR, unmodified. Bit 25: SSE, unmodified. Bit 26: SSE2, unmodified. Bit 27: reserved, cleared. Bit 28: HTT, unmodified. Bits 29-31: reserved, cleared. | |
0x80000000 |
EAX |
Largest extended function number |
Minimum of the actual hardware value and 0x80000019. |
EBX ECX EDX |
Processor vendor |
Unmodified. | |
0x80000001 |
EAX |
Processor version |
Unmodified. (Same information as 0x00000001 EAX.) |
EBX |
BrandId identifier |
Bits 0-15: BrandId, unmodified. Bits 16-31: reserved, cleared. | |
ECX |
Feature identifiers |
Bit 0: LahfSahf. Unmodified. Bit 1: CmpLegacy, unmodified. Bit 2: SVM, cleared. Bit 3: reserved, cleared. Bit 4: AltMovCr8, unmodified. Bits 5-31: reserved, cleared. | |
EDX |
Extended feature flags |
Bit 0: FPU, unmodified. Bit 1: VME, unmodified. Bit 2: DE, unmodified. Bit 3: PSE, unmodified. Bit 4: TSC, unmodified. Bit 5: MSR, unmodified. Bit 6: PAE, unmodified. Bit 7: MCE, unmodified. Bit 8: CMPXCHG8B, unmodified. Bit 9: APIC, unmodified. Bit 10: reserved, cleared. Bit 11: SysCallSysRet, unmodified. Bit 12: MTRR, set. Bit 13: PGE, unmodified. Bit 14: MCA, unmodified for root, cleared otherwise. Bit 15: CMOV, unmodified. Bit 16: PAT, unmodified. Bit 17: PSE36, unmodified. Bit 18: reserved, cleared. Bit 19: reserved, cleared. Bit 20: NX, unmodified. Bit 21: reserved, cleared. Bit 22: MmxExt, unmodified. Bit 23: MMX, unmodified. Bit 24: FXSR, unmodified. Bit 25: FFXSR, unmodified. Bit 26: reserved, cleared. Bit 27: RDTSCP, unmodified. Bit 28: reserved, cleared. Bit 29: LM, unmodified. Bit 30: 3DNowExt, unmodified. Bit 31: 3DNow, unmodified. | |
0x80000002 through 0x80000004 |
All |
Processor name string identifier |
Unmodified. |
0x80000005 |
All |
L1 Cache and TLB identifiers |
Unmodified. |
0x80000006 |
All |
L2 Cache and L2 TLB identifiers |
Unmodified. |
0x80000007 |
EAX EBX ECX EDX |
Advanced power management information |
Unmodified for the partition possessing the CPUManagement privilege (root), cleared otherwise. |
0x80000008 |
EAX |
Long mode address size identifiers |
Bits 0-7: PhysAddrSize, modified to indicate the size of the GPA space that is supported (for the root partition this is unmodified). Bits 8-15: LinAddrSize, modified to indicate the size of the GVA space supported by the hypervisor (for the root partition this is unmodified). Bits 16-31: reserved, cleared. |
|
Reserved |
Cleared. | |
ECX |
Initial APIC ID size |
Bits 0-7: NC, unmodified. Bits 8-11: reserved, cleared. Bits 12-15: ApicIdCoreIdSize, unmodified. | |
EDX |
Reserved |
Cleared. | |
0x80000009 |
All |
Reserved |
Cleared. |
0x8000000A |
All |
SVM revision and feature identification |
Cleared. |
0x8000000B through 0x80000019 |
All |
Reserved |
Cleared. |
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Build date: 11/16/2013