System Physical Address Space
The system physical address space (or SPA space) of the physical computer is the range from 0 to some maximum address that depends on the underlying hardware architecture--typically 2n-1, where 32 ≤ n ≤ 64.
SPAs can be backed by random access memory (RAM) or memory-mapped device registers at the granularity of the architecturally-defined minimum page size, HV_PAGE_SIZE. The layout of the SPA space is ultimately dictated by the physical computer.
SPA pages are specified in terms of SPA page ranges, each of which consists of one or more contiguous SPA pages. RAM SPA ranges are backed by regular memory.
It is a critical invariant for the correct functioning of the hypervisor that all RAM SPA pages are backed by RAM at all times; that is, read and write accesses to these pages should have the expected semantics. The hypervisor relies on the correct behavior of a privileged partition (typically the root partition) in ensuring that this invariant holds.
The hypervisor enforces the following invariants:
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No two RAM-page ranges can overlap.
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Pages that are not within defined RAM-page ranges are to be "not backed" or backed by device memory and are not used by the hypervisor. These pages are inaccessible to all partitions except for the root partition.
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The hypervisor uses only pages within RAM SPA page ranges to store its code and internal data structures.
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Build date: 11/16/2013