Virtual Processor Registers

Associated with each virtual processor is a variety of state that is modeled as processor registers. Most of this state is defined by the underlying processor architecture and consists of architected register values. The hypervisor provides the HvGetVpRegisters and HvSetVpRegisters hypercall functions to let a partition read and write these registers.

If a virtual processor register is modified and the newly specified value is invalid in some way, the hypervisor might or might not immediately return an error. In some cases, a value is invalid only in certain contexts (for example, if a bit within another virtual processor register is set). Therefore, some invalid register values are not detected until the virtual processor resumes execution. In such a case, the virtual processor is suspended, and an intercept message (with a message type HvMessageTypeInvalidVpRegisterValue from the HV_MESSAGE_TYPE enumeration) is sent to the virtual processor's parent partition.

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Build date: 11/16/2013