Hypervisor Boot-time CPUID Feature Requirements
The following table contains a list of CPUID values that are required for the hypervisor to boot.
Index | Register | Description | Start bit | End bit | Virtualized feature set definition between processors in the same system | |
---|---|---|---|---|---|---|
0x00000000 | ||||||
EAX |
Maximum valid standard CPUID index |
0 |
31 |
Hardware-specific If the underlying hardware is AMD-based, the value must be at least 0x00000001. If the underlying hardware is Intel-based, the value must be at least 0x00000004. | ||
EBX |
Processor vendor string |
0 |
31 |
Must match. | ||
ECX |
Processor vendor string |
0 |
31 |
Must match. | ||
EDX |
Processor vendor string |
0 |
31 |
Must match. | ||
0x00000001 | ||||||
EAX |
Stepping |
0 |
3 |
– | ||
Base model |
4 |
7 |
Must match. | |||
Base family |
8 |
11 |
Must match. | |||
Processor type |
12 |
13 |
Must match. | |||
RsvdZ |
14 |
15 |
– | |||
Extended model |
16 |
19 |
Must match. | |||
Extended family |
20 |
27 |
Must match. | |||
RsvdZ |
28 |
31 |
– | |||
EBX |
Miscellaneous information | |||||
Brand identifier |
0 |
7 |
– | |||
CL Flush size |
8 |
15 |
Must match. | |||
Maximum LPs in a physical package |
16 |
23 |
Must match. | |||
Initial APIC ID |
24 |
31 |
– | |||
ECX |
Feature flags and identifiers | |||||
SSE3 |
0 |
0 |
– | |||
RsvdZ |
1 |
2 |
– | |||
MONITOR |
3 |
3 |
– | |||
DS-CPL |
4 |
4 |
– | |||
VMX |
5 |
5 |
If the underlying hardware is Intel-based, must be set everywhere. If the underlying hardware is AMD-based, not applicable. | |||
RsvdZ |
6 |
6 |
– | |||
EST |
7 |
7 |
– | |||
TM2 |
8 |
8 |
– | |||
SSSE3 |
9 |
9 |
– | |||
CNXTID |
10 |
10 |
– | |||
RsvdZ |
11 |
12 |
– | |||
CMPXCHG16B |
13 |
13 |
– | |||
xTPR |
14 |
14 |
– | |||
RsvdZ |
15 |
22 |
– | |||
Population count |
23 |
23 |
– | |||
RsvdZ |
24 |
25 |
– | |||
XSAVE |
26 |
26 |
Must match. | |||
OSXSAVE |
27 |
27 |
Must match. | |||
RsvdZ |
28 |
30 |
– | |||
Hypervisor present |
31 |
31 |
Must be cleared everywhere. | |||
EDX |
Feature information | |||||
FPU |
0 |
0 |
Must be set everywhere. | |||
VME |
1 |
1 |
Must be set everywhere. | |||
DE |
2 |
2 |
Must be set everywhere. | |||
PSE |
3 |
3 |
Must be set everywhere. | |||
TSC |
4 |
4 |
Must be set everywhere. | |||
MSR |
5 |
5 |
Must be set everywhere. | |||
PAE |
6 |
6 |
Must be set everywhere. | |||
MCE |
7 |
7 |
Must be set everywhere. | |||
CMPXCHG8B |
8 |
8 |
Must be set everywhere. | |||
APIC |
9 |
9 |
Must be set everywhere. | |||
RsvdZ |
10 |
10 |
– | |||
SEP |
11 |
11 |
Must be set everywhere. | |||
MTRR |
12 |
12 |
Must be set everywhere. | |||
PGE |
13 |
13 |
Must be set everywhere. | |||
MCA |
14 |
14 |
Must be set everywhere. | |||
CMOV |
15 |
15 |
Must be set everywhere. | |||
PAT |
16 |
16 |
Must be set everywhere. | |||
PSE-36 |
17 |
17 |
Must be set everywhere. | |||
PSN |
18 |
18 |
– | |||
CLFSH |
19 |
19 |
Must be set everywhere. | |||
RsvdZ |
20 |
20 |
– | |||
DS |
21 |
21 |
– | |||
ACPI |
22 |
22 |
– | |||
MMX |
23 |
23 |
Must be set everywhere. | |||
FXSR |
24 |
24 |
Must be set everywhere. | |||
SSE |
25 |
25 |
Must be set everywhere. | |||
SSE2 |
26 |
26 |
Must be set everywhere. | |||
SS |
27 |
27 |
– | |||
HTT |
28 |
28 |
– | |||
TM |
29 |
29 |
– | |||
RsvdZ |
30 |
30 |
– | |||
PBE |
31 |
31 |
– | |||
0x80000000 | ||||||
EAX |
Highest extended CPUID leaf |
0 |
31 |
Hardware specific. If the underlying hardware is AMD-based, the value must be at least 0x80000008. If the underlying hardware is Intel based, the value must be at least 0x80000001. | ||
EBX |
Processor vendor string |
0 |
31 |
– | ||
ECX |
Processor vendor string |
0 |
31 |
– | ||
EDX |
Processor vendor string |
0 |
31 |
– | ||
0x80000001 | ||||||
EAX |
Stepping |
0 |
3 |
– | ||
Base model |
4 |
7 |
Must match. | |||
Base family |
8 |
11 |
Must match. | |||
Processor type |
12 |
13 |
Must match. | |||
RsvdZ |
14 |
15 |
– | |||
Extended model |
16 |
19 |
Must match. | |||
Extended family |
20 |
27 |
Must match. | |||
RsvdZ |
28 |
31 |
– | |||
EBX |
Brand ID |
0 |
15 |
Must match. | ||
RsvdZ |
16 |
27 |
– | |||
Package type |
28 |
31 |
Must match. | |||
ECX |
Extended feature flag and feature identifiers | |||||
LahfSahf |
0 |
0 |
– | |||
CmpLegacy |
1 |
1 |
– | |||
SVM |
2 |
2 |
If underlying hardware is AMD-based, must be set everywhere. If underlying hardware is Intel-based, not applicable. | |||
ExtApicSpace |
3 |
3 |
– | |||
AltMovCr8 |
4 |
4 |
– | |||
ABM |
5 |
5 |
– | |||
SSE4A |
6 |
6 |
– | |||
MisAlignSse |
7 |
7 |
– | |||
3DNowPrefetch |
8 |
8 |
– | |||
OSVW |
9 |
9 |
– | |||
RsvdZ |
10 |
10 |
– | |||
SSE5 |
11 |
11 |
– | |||
SKINIT |
12 |
12 |
– | |||
WDT |
13 |
13 |
– | |||
RsvdZ |
14 |
31 |
– | |||
EDX |
Extended feature flags | |||||
FPU |
0 |
0 |
Must be set everywhere. | |||
VME |
1 |
1 |
Must be set everywhere. | |||
DE |
2 |
2 |
Must be set everywhere. | |||
PSE |
3 |
3 |
Must be set everywhere. | |||
TSC |
4 |
4 |
Must be set everywhere. | |||
MSR |
5 |
5 |
Must be set everywhere. | |||
PAE |
6 |
6 |
Must be set everywhere. | |||
MCE |
7 |
7 |
Must be set everywhere. | |||
CMPXCHG8B |
8 |
8 |
Must be set everywhere. | |||
APIC |
9 |
9 |
Must be set everywhere. | |||
RsvdZ |
10 |
10 |
– | |||
SysCallSysRet |
11 |
11 |
Must be set everywhere. | |||
MTRR |
12 |
12 |
Must be set everywhere. | |||
PGE |
13 |
13 |
Must be set everywhere. | |||
MCA |
14 |
14 |
Must be set everywhere. | |||
CMOV |
15 |
15 |
Must be set everywhere. | |||
PAT |
16 |
16 |
Must be set everywhere. | |||
PSE36 |
17 |
17 |
Must be set everywhere. | |||
RsvdZ |
18 |
19 |
– | |||
Execute disabled/No execute |
20 |
20 |
Must be set everywhere. | |||
RsvdZ |
21 |
21 |
– | |||
MmxExt |
22 |
22 |
– | |||
MMX |
23 |
23 |
Must be set everywhere. | |||
FXSR |
24 |
24 |
Must be set everywhere. | |||
FFXSR |
25 |
25 |
– | |||
Page1GB |
26 |
26 |
– | |||
RDTSCP |
27 |
27 |
– | |||
RsvdZ |
28 |
28 |
– | |||
LM |
29 |
29 |
Must be set everywhere. | |||
3DNowExt |
30 |
30 |
– | |||
3DNow |
31 |
31 |
– | |||
0x80000005 |
L1 Cache and TLB identifiers (all registers) | |||||
EAX |
L1ITlb2and4MSize |
0 |
7 |
If underlying hardware is AMD-based, must match. If underlying hardware is Intel-based, not applicable. | ||
L1ITlb2and4MAssoc |
8 |
15 |
If underlying hardware is AMD-based, must match. If underlying hardware is Intel-based, not applicable. | |||
L1DTlb2and4MSize |
16 |
23 |
If underlying hardware is AMD-based, must match. If underlying hardware is Intel-based, not applicable. | |||
L1DTlb2and4MAssoc |
24 |
31 |
If underlying hardware is AMD-based, must match. If underlying hardware is Intel-based, not applicable. | |||
EBX |
L1ITlb4KSize |
0 |
7 |
If underlying hardware is AMD-based, must match. If underlying hardware is Intel-based, not applicable. | ||
L1ITlb4KAssoc |
8 |
15 |
If underlying hardware is AMD-based, must match. Must match on AMD, If underlying hardware is Intel-based, not applicable. | |||
L1DTlb4KSize |
16 |
23 |
If underlying hardware is AMD-based, must match. If underlying hardware is Intel-based, not applicable. | |||
L1DTlb4KAssoc |
24 |
31 |
If underlying hardware is AMD-based, must match. If underlying hardware is Intel-based, not applicable. | |||
ECX |
L1DcLineSize |
0 |
7 |
If underlying hardware is AMD-based, must match. If underlying hardware is Intel-based, not applicable. | ||
L1DcLinesPerTag |
8 |
15 |
If underlying hardware is AMD-based, must match. If underlying hardware is Intel-based, not applicable. | |||
L1DcAssoc |
16 |
23 |
If underlying hardware is AMD-based, must match. If underlying hardware is Intel-based, not applicable. | |||
L1DcSize |
24 |
31 |
If underlying hardware is AMD-based, must match. If underlying hardware is Intel-based, not applicable. | |||
EDX |
L1IcLineSize |
0 |
7 |
If underlying hardware is AMD-based, must match. If underlying hardware is Intel-based, not applicable. | ||
L1IcLinesPerTag |
8 |
15 |
If underlying hardware is AMD-based, must match. If underlying hardware is Intel-based, not applicable. | |||
L1IcAssoc |
16 |
23 |
If underlying hardware is AMD-based, must match. If underlying hardware is Intel-based, not applicable. | |||
L1IcSize |
24 |
31 |
If underlying hardware is AMD-based, must match. If underlying hardware is Intel-based, not applicable. | |||
0x80000006 |
L2 Cache and L2 TLB identifiers | |||||
EAX |
L2ITlb2and4MSize |
0 |
11 |
If underlying hardware is AMD-based, must match. If underlying hardware is Intel-based, not applicable. | ||
L2ITlb2and4MAssoc |
12 |
15 |
If underlying hardware is AMD-based, must match. If underlying hardware is Intel-based, not applicable. | |||
L2DTlb2and4MSize |
16 |
27 |
If underlying hardware is AMD-based, must match. If underlying hardware is Intel-based, not applicable. | |||
L2DTlb2and4MAssoc |
28 |
31 |
If underlying hardware is AMD-based, must match. If underlying hardware is Intel-based, not applicable. | |||
EBX |
L2ITlb4KSize |
0 |
11 |
If underlying hardware is AMD-based, must match. If underlying hardware is Intel-based, not applicable. | ||
L2ITlb4KAssoc |
12 |
15 |
If underlying hardware is AMD-based, must match. If underlying hardware is Intel-based, not applicable. | |||
L2DTlb4KSize |
16 |
27 |
If underlying hardware is AMD-based, must match. If underlying hardware is Intel-based, not applicable. | |||
L2DTlb4KAssoc |
28 |
31 |
If underlying hardware is AMD-based, must match. If underlying hardware is Intel-based, not applicable. | |||
ECX |
L2 Line Size |
0 |
7 |
If underlying hardware is AMD-based, must match. If underlying hardware is Intel-based, not applicable. | ||
L2 Lines per tag |
8 |
11 |
If underlying hardware is AMD-based, must match. If underlying hardware is Intel-based, not applicable. | |||
L2 Associativity |
12 |
15 |
If underlying hardware is AMD-based, must match. If underlying hardware is Intel-based, not applicable. | |||
L2 cache size in kilobytes |
16 |
31 |
If underlying hardware is AMD-based, must match. If underlying hardware is Intel-based, not applicable. | |||
EDX |
L3LineSize |
0 |
7 |
If underlying hardware is AMD-based, must match. If underlying hardware is Intel-based, not applicable. | ||
L3LinesPerTag |
8 |
11 |
If underlying hardware is AMD-based, must match. If underlying hardware is Intel-based, not applicable. | |||
L3Assoc |
12 |
15 |
If underlying hardware is AMD-based, must match. If underlying hardware is Intel-based, not applicable. | |||
RsvdZ |
16 |
17 |
If underlying hardware is AMD-based, must match. If underlying hardware is Intel-based, not applicable. | |||
L3Size |
18 |
31 |
If underlying hardware is AMD-based, must match. If underlying hardware is Intel-based, not applicable. | |||
0x80000008 | ||||||
EAX |
PhysAddrSize |
0 |
7 |
Must be less than or equal to 48 | ||
LinAddrSize |
8 |
15 |
– | |||
RsvdZ |
16 |
31 |
– | |||
EBX |
RsvdZ |
0 |
31 |
– | ||
ECX |
NC |
0 |
7 |
If underlying hardware is AMD-based, must match. If underlying hardware is Intel-based, not applicable. | ||
RsvdZ |
8 |
11 |
– | |||
ApicIdCoreIdSize |
12 |
15 |
If underlying hardware is AMD-based, must match. If underlying hardware is Intel-based, not applicable. | |||
RsvdZ |
16 |
31 |
– | |||
EDX |
RsvdZ |
0 |
31 |
– | ||
0x8000000A |
SVM revision and feature identification | |||||
EAX |
SvmRev |
0 |
7 |
If underlying hardware is AMD-based, must match. If underlying hardware is Intel-based, not applicable. | ||
RsvdZ |
8 |
31 |
– | |||
EBX |
NASID |
0 |
31 |
If underlying hardware is AMD-based, must match. If underlying hardware is Intel-based, not applicable. | ||
ECX |
RsvdZ |
0 |
31 |
– | ||
EDX |
NP |
0 |
0 |
– | ||
LBRVirt |
1 |
1 |
– | |||
SVML |
2 |
2 |
– | |||
NRIPS |
3 |
3 |
– | |||
RsvdZ |
4 |
31 |
– |
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Build date: 11/16/2013