Hypervisor Statistics Counter Definition

The hypervisor exposes statistics counters to guest operating systems, upon request, by using overlay pages in a partition's GPA space. Each page is a packed collection of statistics groups. Each group is prefixed by a header that contains the group's identification, the format version, and the size of the group in bytes (not including the header). The array of values within the group (after the header) can be accessed by using a zero-based index into the array. Index zero references the group's header. Each 64-bit value is of a particular type.

The following sections describe each supported statistics counter type and the groups that it might contain. For more information about statistics counters, see Hypervisor Statistics.

Hypervisor Counters

Hypervisor counters describe hypervisor-wide states and items. There is only one hypervisor counter group that consists of only architectural values. Because counters of this counter group count values of a global class, counters of this counter group can only be accessed by the root partition.

Counters of the architectural hypervisor counter group are defined by the following values:

Group identifier: HV_STATISTICS_TYPE_HCA_ID
Group version: HV_STATISTICS_TYPE_HCA_VERSION

The following table describes the architectural hypervisor counter group (accessible from the root partition only).

Index	Counter	Type	Description
1	Logical processors	UINT64	The number of logical processors that are present in the computer.
2	Partitions	UINT64	The number of partitions (that is, virtual machines) that are present in the computer.
3	Total pages	UINT64	The number of bootstrap and deposited pages in the hypervisor.
4	Virtual processors	UINT64	The number of virtual processors that are present in the computer.
5	Monitored notifications	UINT64	The number of monitored notifications that are registered with the hypervisor.

Logical Processor Counters

Counters for logical processor objects provide information about logical processor-related states and items. The number of logical processor objects matches the number of logical processors in the computer. The logical processor-related states and items consist of both architectural and release-specific values. As counters of a global class, logical processor counters can be only accessed by the root partition.

Counters of the architectural logical processor counter group are defined by the following values:

Group identifier: HV_STATISTICS_TYPE_LPA_ID
Group version: HV_STATISTICS_TYPE_LPA_VERSION

The following table describes the architectural logical processor counter group (accessible from the root partition only).

Index	Counter	Type	Description
1	Global time	UINT64	The global time on this logical processor.
2	Total run time	UINT64	The total time (in 100ns) spent by the processor in guest and hypervisor code.
3	Hypervisor run time	UINT64	The total time (in 100ns) spent by the processor in hypervisor code.
4	Hardware interrupts/sec	UINT64	The rate of hardware interrupts on the processor (excluding hypervisor interrupts).
5	Context switches/sec	UINT64	The rate of virtual processor context switches on the processor.
6	Inter-processor interrupts/sec	UINT64	The rate of hypervisor interprocessor interrupts delivered to the processor.
7	Scheduler interrupts/sec	UINT64	The rate of hypervisor scheduler interrupts on the processor.
8	Timer interrupts/sec	UINT64	The rate of hypervisor timer interrupts on the processor.
9	Interprocessor interrupts sent/sec	UINT64	The rate of hypervisor interprocessor interrupts sent by the processor.
10	Processor halts/sec	UINT64	The rate of entries into a halt state by the processor.
11	Monitor transition cost	UINT64	The hardware cost of transitions into the hypervisor.
12	Context switch time	UINT64	The total time (in nanoseconds) spent switching between virtual processors.
13	C1 transitions/sec	UINT64	The rate at which that CPU enters the C1 low-power idle state.
14	% C1 time	UINT64	The percentage of time the processor spends in the C1 low-power idle state. % C1 time is a subset of the total processor idle time.
15	C2 transitions/sec	UINT64	The rate at which that CPU enters the C2 low-power idle state.
16	% C2 time	UINT64	The percentage of time the processor spends in the C2 low-power idle state. % C2 time is a subset of the total processor idle time.
17	C3 transitions/sec	UINT64	The rate at which that CPU enters the C3 low-power idle state.
18	% C3 time		The percentage of time the processor spends in the C3 low-power idle state. % C3 time is a subset of the total processor idle time.

Partition Counters

Counters for partition objects provide information about states and items for a particular partition. The number of partition objects matches the number of partitions present in the computer. Partition states and items consist of only architectural values. As counters of a local class, partition counters can be accessed by a partition and its parent. In hypervisor version 1, the root partition is the parent partition.

Counters of the architectural partition counter group are defined by the following values:

Group identifier: HV_STATISTICS_TYPE_PA_ID
Group version: HV_STATISTICS_TYPE_PA_VERSION

The following table describes the architectural partition counter group (accessible from a partition and its parent).

Index	Counter	Type	Description
1	Virtual processors	UINT64	The number of virtual processors that are present in the partition.

Counters of the release-specific partition counter group are defined by the following values:

Group identifier: HV_STATISTICS_TYPE_PV_ID
Group version: HV_STATISTICS_TYPE_PV_VERSION

The following table describes the release-specific partition counter group (accessible from a partition and its parent).

Index	Counter	Type	Description
1	Virtual TLB Pages	UINT64	The number of pages used by the virtual TLB of the partition.
2	Address spaces	UINT64	The number of address spaces in the virtual TLB of the partition.
3	Deposited pages	UINT64	The number of pages that are deposited into the partition.
4	GPA pages	UINT64	The number of pages that are present in the GPA space of the partition (zero for root partition).
5	GPA space modifications/sec	UINT64	The rate of modifications to the GPA space of the partition.
6	Virtual TLB flush entries/sec	UINT64	The rate of flushes of the entire virtual TLB.
7	Recommended virtual TLB size	UINT64	The recommended number of pages to be deposited for the virtual TLB.

Virtual Processor Counters

Counters for virtual processor objects provide information about states and items for a particular virtual processor. The number of virtual processor objects matches the number of virtual processors that are present in a given partition. Virtual processor states and items consist of both architectural and release-specific values. As counters of a local class, virtual processor counters can be accessed by the partition and its parent. In hypervisor version 1, the root partition is the parent partition.

Counters of the architectural virtual processor counter group are defined by the following values:

Group identifier: HV_STATISTICS_TYPE_VPA_ID
Group version: HV_STATISTICS_TYPE_VPA_VERSION

The following table describes the architectural virtual processor counter group (accessible from a partition and its parent).

Index	Counter	Type	Description
1	Total run time	UINT64	The total time (in 100ns) spent by the processor in guest and hypervisor code.
2	Hypervisor run time	UINT64	The total time (in 100ns) spent by the virtual processor in hypervisor code.

Counters of the release-specific virtual processor counter group are defined by the following values:

Group identifier: HV_STATISTICS_TYPE_VPV_ID
Group version: HV_STATISTICS_TYPE_VPV_VERSION

The following table describes the release-specific virtual processor counter group (accessible from a partition and its parent).

Index	Counter	Type	Description
1	Hypercalls/sec	UINT64	The rate of the hypercalls made by guest code on the virtual processor.
2	Hypercalls cost	UINT64	The average time (in nanoseconds) spent processing a hypercall.
3	Page invalidations/sec	UINT64	The rate of INVLPG instructions executed by guest code on the virtual processor.
4	Page invalidations cost	UINT64	The average time (in nanoseconds) spent processing an INVLPG instruction.
5	Control register accesses/sec	UINT64	The rate of control register accesses by guest code on the virtual processor.
6	Control register accesses cost	UINT64	The average time (in nanoseconds) spent processing a control register access.
7	IO instructions/sec	UINT64	The rate of IO instructions executed by guest code on a virtual processor.
8	IO instructions cost	UINT64	The average time (in nanoseconds) spent processing an IO instruction.
9	HLT instructions/sec	UINT64	The rate of HLT instructions executed by guest code on a virtual processor.
10	HLT instructions cost	UINT64	The average time (in nanoseconds) spent processing an HLT instruction.
11	MWAIT instructions/sec	UINT64	The rate of MWAIT instructions executed by guest code on a virtual processor.
12	MWAIT instructions cost	UINT64	The average time (in nanoseconds) spent processing an MWAIT instruction.
13	CPUID instructions/sec	UINT64	The rate of CPUID instructions executed by guest code on a virtual processor.
14	CPUID instructions cost	UINT64	The average time (in nanoseconds) spent processing a CPUID instruction.
15	MSR accesses/sec	UINT64	The rate of MSR instructions executed by guest code on a virtual processor.
16	MSR accesses cost	UINT64	The average time (in nanoseconds) spent processing an MSR instruction.
17	Other intercepts/sec	UINT64	The rate of other intercepts triggered by guest code on a virtual processor.
18	Other intercepts cost	UINT64	The average time (in nanoseconds) spent processing other intercepts.
19	External interrupts/sec	UINT64	The rate of external interrupts received by the hypervisor while executing guest code on the virtual processor.
20	External interrupts cost	UINT64	The average time (in nanoseconds) spent processing an external interrupt.
21	Pending interrupts/sec	UINT64	The rate of intercepts due to a task priority (TPR) reduction by guest code on the virtual processor.
22	Pending interrupts cost	UINT64	The average time (in nanoseconds) spent processing a pending interrupt intercept.
23	Emulated instructions/sec	UINT64	The rate of emulated instructions while executing guest code on the virtual processor.
24	Emulated instructions cost	UINT64	The average time (in nanoseconds) spent emulating an instruction.
25	Debug register accesses/sec	UINT64	The rate of debug register accesses by guest code on the virtual processor.
26	Debug register accesses cost	UINT64	The average time (in nanoseconds) spent handling a debug register access.
27	Page fault intercepts/sec	UINT64	The rate of page fault exceptions intercepted by the hypervisor while executing guest code on the virtual processor.
28	Page fault intercepts cost	UINT64	The average time (in nanoseconds) spent processing a page fault intercept.
29	Guest page table maps/sec	UINT64	The rate of map operations for guest page table pages.
30	Large page TLB fills/sec	UINT64	The rate of virtual TLB misses on large pages.
31	Small page TLB fills/sec	UINT64	The rate of virtual TLB misses on 4K pages.
32	Reflected guest page faults/sec	UINT64	The rate of page fault exceptions delivered to the guest.
33	APIC MMIO accesses/sec	UINT64	The rate of APIC MMIO register accesses by guest code on the virtual processor.
34	IO intercept messages/sec	UINT64	The rate of IO intercept messages sent to the parent partition.
35	Memory intercept messages/sec	UINT64	The rate of memory intercept messages sent to the parent partition.
36	APIC EOI accesses/sec	UINT64	The rate of APIC EOI register writes by guest code on the virtual processor.
37	Other messages/sec	UINT64	The rate of other intercept messages sent to the parent partition.
38	Page table allocations/sec	UINT64	The rate of page table allocations in the virtual TLB.
39	Logical processor migrations/sec	UINT64	The rate of migrations by the virtual processor to a different logical processor.
40	Address space evictions/sec	UINT64	The rate of address space evictions in the virtual TLB.
41	Address space switches/sec	UINT64	The rate of address space switches by guest code on the virtual processor.
42	Address domain flushes/sec	UINT64	The rate of explicit flushes of the virtual TLB by guest code on the virtual processor.
43	Address space flushes/sec	UINT64	The rate of explicit flushes of one address space by guest code on the virtual processor.
44	Global GVA range flushes/sec	UINT64	The rate of explicit flushes of a virtual address range in all address spaces by guest code on the virtual processor.
45	Local flushed GVA ranges/sec	UINT64	The rate of explicit flushes of a virtual address range in one address space by guest code on the virtual processor.
46	Page table evictions/sec	UINT64	The rate of page table evictions in the virtual TLB.
47	Page table reclamations/sec	UINT64	The rate of reclamations of unreferenced page tables in the virtual TLB.
48	Page table resets/sec	UINT64	The rate of page table resets In the virtual TLB.
49	Page table validations/sec	UINT64	The rate of page table validations to remove state entries in the virtual TLB.
50	APIC TPR accesses/sec	UINT64	The rate of APIC TPR accesses by guest code on the virtual processor.
51	Page table write intercepts/sec	UINT64	The rate of write intercepts on guest page tables by guest code on the virtual processor.
52	Synthetic interrupts/sec	UINT64	The rate of synthetic interrupts delivered to the virtual processor.
53	Virtual interrupts/sec	UINT64	The rate of interrupts (including synthetic interrupts) delivered to the virtual processor.
54	APIC IPIs sent/sec	UINT64	The rate of APIC inter-processor interrupts (including to self) sent to the virtual processor.
55	APIC self IPIs sent/sec	UINT64	The rate of APIC interrupts sent by the virtual processor to itself.
56	GPA space hypercalls/sec	UINT64	The rate of guest physical address space hypercalls made by guest code on the virtual processor.
57	Logical processor hypercalls/sec	UINT64	The rate of logical processor hypercalls made by guest code on the virtual processor.
58	Long spin wait hypercalls/sec	UINT64	The rate of long spin wait hypercalls made by guest code on the virtual processor.
59	Other hypercalls/sec	UINT64	The rate of other hypercalls made by guest code on the virtual processor.
60	Synthetic interrupt hypercalls/sec	UINT64	The rate of Synthetic Interrupt hypercalls made by guest code on the virtual processor.
61	Virtual interrupt hypercalls/sec	UINT64	The rate of Virtual Interrupt hypercalls made by guest code on the virtual processor.
62	Virtual MMU hypercalls/sec	UINT64	The rate of Virtual MMU hypercalls made by guest code on the virtual processor.
63	Virtual processor hypercalls/sec	UINT64	The rate of Virtual Processor hypercalls made by guest code on the virtual processor.

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Build date: 11/16/2013