Hypervisor Messages

When a message is sent, the hypervisor performs the following operations:

  • The hypervisor selects a free message buffer. The set of available message buffers depends on the event that triggered the sending of the message.

  • The hypervisor marks the message buffer "in use" and fills in the message header with the message type, payload size, and information about the sender. Finally, the hypervisor fills in the message payload. The contents of the payload depend on the event that triggered the message. Any message type that has the high bit set in the HV_MESSAGE_TYPE value is generated by the hypervisor. The payload for messages that a caller sends by calling the HvPostMessage hypercall function must be defined by the caller.

  • The hypervisor then appends the message buffer to a receiving message queue. The receiving message queue depends on the event that triggered the sending of the message. For all message types, SINTx is either implicit (in the case of intercept messages), explicit (in the case of timer messages), or specified by a port identifier (in the case of guest messages). The target virtual processor is either explicitly specified or chosen by the hypervisor when the message is enqueued. Virtual processors whose SynIC or SIM page (for more information about these pages, see SIM and SIEF Pages) is disabled will not be considered as potential targets. If no targets are available, the hypervisor terminates the operation and returns an error to the caller.

  • The hypervisor then determines whether the specified SINTx message slot within the SIM page for the target virtual processor is empty. (For more information about the SIM page, see SIM and SIEF Pages.) If the message type in the message slot is equal to HvMessageTypeNone from the HV_MESSAGE_TYPE enumeration (that is, zero), the message slot is assumed to be empty. In this case, the hypervisor dequeues the message buffer and copies the contents of the message buffer to the message slot within the SIM page. The hypervisor can copy only the number of payload bytes that are associated with the message. The hypervisor also attempts to generate an edge-triggered interrupt for the specified SINTx. If the APIC is software disabled or the SINTx is masked, the interrupt is lost. The arrival of this interrupt notifies the guest that a new message has arrived. If the SIM page is disabled or the message slot within the SIM page is not empty, the message remains queued, and no interrupt is generated.

As with any fixed-priority interrupt, the interrupt is not acknowledged by the virtual processor until the process priority register (PPR) is less than the vector that is specified in the SINTx register and interrupts are not masked by the virtual processor (rFLAGS[IF] is set to 1).

Multiple message buffers with the same SINTx can be queued to a virtual processor. In this case, the hypervisor will deliver the first message (that is, write it to the SIM page) and leave the other messages queued until one of the following events occur:

  • Another message buffer is queued.

  • The guest indicates the end of message (EOM) by writing to the SynIC's EOM register.

In both of the preceding cases, the hypervisor will scan one or more message buffer queues and attempt to deliver additional messages. The hypervisor also attempts to generate an edge-triggered interrupt, which indicates that a new message has arrived.

If a queued message cannot be delivered because the corresponding SIM entry is still in use, the hypervisor will attempt to deliver the message again after an unspecified time (typically on the order of milliseconds). To avoid this potential latency, software should mark the SIM entry as unused before indicating an EOM.

 

 

Send comments about this topic to Microsoft

Build date: 11/16/2013

Show:
© 2014 Microsoft. All rights reserved.