SynIC MSRs
In addition to the memory-mapped registers that are defined for a local APIC, the following model-specific registers (MSRs) are defined in the SynIC. Each virtual processor has its own copy of these registers, so they can be programmed independently.
| MSR address | Register name | Function |
|---|---|---|
|
0x40000080 |
HV_X64_MSR_SCONTROL |
SynIC Control |
|
0x40000081 |
HV_X64_MSR_SVERSION |
SynIC Version |
|
0x40000082 |
HV_X64_MSR_SIEFP |
Interrupt Event Flags Page |
|
0x40000083 |
HV_X64_MSR_SIMP |
Interrupt Message Page |
|
0x40000084 |
HV_X64_MSR_EOM |
End of message |
|
0x40000090 |
HV_X64_MSR_SINT0 |
Interrupt source 0 (hypervisor) |
|
0x40000091 |
HV_X64_MSR_SINT1 |
Interrupt source 1 |
|
0x40000092 |
HV_X64_MSR_SINT2 |
Interrupt source 2 |
|
0x40000093 |
HV_X64_MSR_SINT3 |
Interrupt source 3 |
|
0x40000094 |
HV_X64_MSR_SINT4 |
Interrupt source 4 |
|
0x40000095 |
HV_X64_MSR_SINT5 |
Interrupt source 5 |
|
0x40000096 |
HV_X64_MSR_SINT6 |
Interrupt source 6 |
|
0x40000097 |
HV_X64_MSR_SINT7 |
Interrupt source 7 |
|
0x40000098 |
HV_X64_MSR_SINT8 |
Interrupt source 8 |
|
0x40000099 |
HV_X64_MSR_SINT9 |
Interrupt source 9 |
|
0x4000009A |
HV_X64_MSR_SINT10 |
Interrupt source 10 |
|
0x4000009B |
HV_X64_MSR_SINT11 |
Interrupt source 11 |
|
0x4000009C |
HV_X64_MSR_SINT12 |
Interrupt source 12 |
|
0x4000009D |
HV_X64_MSR_SINT13 |
Interrupt source 13 |
|
0x4000009E |
HV_X64_MSR_SINT14 |
Interrupt source 14 |
|
0x4000009F |
HV_X64_MSR_SINT15 |
Interrupt source 15 |
The following sections show how the MSRs in the preceding table are formatted:
Send comments about this topic to Microsoft
Build date: 11/16/2013