HV_X64_FP_MMX_REGISTER union
The HV_X64_FP_MMX_REGISTER union describes how a floating-point or MMX-instruction register is encoded.
Syntax
typedef union _HV_X64_FP_MMX_REGISTER { HV_UINT128 AsUINT128; HV_X64_FP_REGISTER Fp; UINT64 Mmx; } HV_X64_FP_MMX_REGISTER, *PHV_X64_FP_MMX_REGISTER;
Members
- AsUINT128
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A member in the union that can hold one 128-bit floating-point or MMX-instruction value.
- Fp
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A HV_X64_FP_REGISTER union that identifies how a floating-point register is encoded.
- Mmx
-
A 64-bit value that identifies how an MMX-instruction register is encoded.
Remarks
Requirements
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See also
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Build date: 11/16/2013
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