HV_X64_PENDING_INTERRUPTION_REGISTER union

The HV_X64_PENDING_INTERRUPTION_REGISTER union identifies how the HvX64RegisterPendingInterruption register is encoded.

Syntax

typedef union _HV_X64_PENDING_INTERRUPTION_REGISTER {
  UINT64 AsUINT64;
  struct {
    UINT32 InterruptionPending  :1;
    UINT32 InterruptionType  :3;
    UINT32 DeliverErrorCode  :1;
    UINT32 Reserved  :11;
    UINT32 InterruptionVector  :16;
    UINT32 ErrorCode;
  };
} HV_X64_PENDING_INTERRUPTION_REGISTER, *PHV_X64_PENDING_INTERRUPTION_REGISTER;

Members

AsUINT64

A member in the union that can hold one 64-bit value that identifies how the HvX64RegisterPendingInterruption register is encoded.

InterruptionPending

A UINT32 value that specifies whether an interruption is pending. If InterruptionPending is cleared (set to 0), no interruption is pending, and the values in the other members of HV_X64_PENDING_INTERRUPTION_REGISTER are invalid. Setting this member is equivalent to setting the first bit of the 64-bit AsUINT64 member (0x0000000000000001).

InterruptionType

A HV_X64_PENDING_INTERRUPTION_TYPE value that identifies the type of pending interruption. The value is set in the second through fourth bits of the 64-bit AsUINT64 member (0x000000000000000E).

DeliverErrorCode

A UINT32 value that indicates whether an error code should be pushed on the stack as part of the interruption. Setting this member is equivalent to setting the fifth bit of the 64-bit AsUINT64 member (0x0000000000000010).

Reserved

This member is reserved and should be set to zero. Setting this member to zero is equivalent to setting the sixth through sixteenth bits (0x000000000000FFE0) of the 64-bit AsUINT64 member to zeros.

InterruptionVector

A UINT32 value that indicates the vector to use for the exception. The vector value is set in the seventeenth through thirty-second bits of the 64-bit AsUINT64 member (0x00000000FFFF0000).

ErrorCode

A UINT32 value that indicates whether an error code should be pushed on the stack as part of the interruption. Setting this member is equivalent to setting the fifth bit of the 64-bit AsUINT64 member (0x0000000000000010).

Remarks

The HvX64RegisterPendingInterruption register is used to indicate whether a pending interruption exists for the virtual processor. An interruption is defined as any event that is delivered through the virtual processor's interrupt descriptor table (for example, exceptions, interrupts, or debug traps). If an interruption is pending, the hypervisor will generate the interruption when the virtual processor resumes execution. This allows code that runs within the parent partition, for example, to respond to an MSR intercept by generating a general protection fault.

If an intercept is generated during the delivery of an interruption, the hypervisor holds the interruption as pending and sends an intercept message to the parent partition. The parent partition can resolve the intercept and resume the virtual processor. In this situation, the hypervisor will redeliver the interruption.

Requirements

See also

HV_X64_PENDING_INTERRUPTION_TYPE

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Build date: 11/16/2013