HV_X64_FP_REGISTER union
The HV_X64_FP_REGISTER union identifies how a floating-point register is encoded.
Syntax
typedef union _HV_X64_FP_REGISTER { HV_UINT128 AsUINT128; struct { UINT64 Mantissa; UINT64 BiasedExponent :15; UINT64 Sign :1; UINT64 Reserved :48; }; } HV_X64_FP_REGISTER, *PHV_X64_FP_REGISTER;
Members
- AsUINT128
-
A member in the union that can hold one 128-bit value that identifies how a floating-point register is encoded.
- Mantissa
-
A UINT64 value that specifies the mantissa of a floating-point number (that is, the significant digits of the floating-point number). The mantissa is set in the first group of 64 bits of the 128-bit AsUINT128 member.
- BiasedExponent
-
A UINT64 value that specifies the exponent of a floating-point number. The exponent is set in the first through fifteenth bits of the second group of 64 bits of the 128-bit AsUINT128 member (0x0000000000007FFF).
- Sign
-
A UINT64 value that specifies the exponent sign of a floating-point number. The exponent sign is set in the sixteenth bit of the second group of 64 bits of the 128-bit AsUINT128 member (0x0000000000008000).
- Reserved
-
This member is reserved and should be set to zero. Setting this member to zero is equivalent to setting the remaining 48 bits of the second group of 64 bits of the 128-bit AsUINT128 member (0xFFFFFFFFFFFF0000).
Remarks
The HV_X64_FP_REGISTER union is used in the HV_REGISTER_VALUE union.
Requirements
|
Header |
|
|---|
See also
Send comments about this topic to Microsoft
Build date: 11/16/2013